What Happens to the Ripple Voltage When You Add the Capacitor

Output Voltage Ripple

The output voltage ripple across Rb is the vector sum of ∆vC and ∆vESR.

From: Power Electronics , 2018

Power Management

Hank Zumbahlen , with the engineering staff of Analog Devices, in Linear Circuit Design Handbook, 2008

Switching Regulator Output Filtering

In order to minimize switching regulator output voltage ripple it is often necessary to add together boosted filtering. In many cases, this is more than efficient than simply adding parallel capacitors to the master output capacitor to reduce ESR.

Output ripple current in a boost converter is pulsating, while that of a cadet converter is a sawtooth. In whatsoever event, the high frequency components in the output ripple electric current can exist removed with a small inductor (2–10 μH or and then followed by a low ESR capacitor). Figure 9-61 shows a uncomplicated LC filter on the output of a switching regulator whose switching frequency is f. Generally the actual value of the filter capacitor is non as important as its ESR when filtering the switching frequency ripple. For instance, the reactance of a 100 μF capacitor at 100 kHz is approximately 0.016 Ω, which is much less than available ESRs.

Figure 9-61:. Switching regulator output filtering

The capacitor ESR and the inductor reactance attenuate the ripple voltage by a factor of approximately 2πfL/ESR. The example shown in Figure ix-61 uses a ten μH inductor and a capacitor with an ESR of 0.2 Ω. This combination attenuates the output ripple by a factor of well-nigh 32.

The inductor core material is non critical, merely it should exist rated to handle the load current. Also, its DC resistance should be low enough so that the load current does not crusade a significant voltage drop beyond information technology.

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Pace-down μModule regulator produces 15A output from inputs down to 1.5V—no bias supply required

Alan Chern , Jason Sekanina , in Analog Circuit Design, Volume Three, 2015

Input and output ripple

Output capacitors should take low ESR to encounter output voltage ripple and transient requirements. A mixture of low ESR polymer and/or ceramic

capacitors is sufficient for producing low output ripple with minimal noise and spiking. Output capacitors are called to optimize transient load response and loop stability to meet the application load-step requirements past using the Excel-based LTpowerCAD design tool. (Table 5 of the LTM4611 data sail provides guidance for applications with 7.5A load-steps and 1μs transition times.) For this design instance, four 100μF ceramic capacitors are used. Figures 177.3 and 177.4 show input and output ripple at 15A load with 20MHz bandwidth-limit. View the associated videos to run across the test methodology, as well equally ripple waveforms without bandwidth limiting.

Effigy 177.3. 5V_IN to 1.5V_OUT at 15A Output Load

Figure 177.4. 1.8V_IN to one.5V_OUT at 15A Output Load

For this design, the choice of input capacitors is disquisitional due to the depression input voltage range. Long input traces can crusade voltage drops, which could nuisance-trip the μModule regulator'south undervoltage lockout (UVLO) detection circuitry. Input ripple, typically a non-issue with higher input voltages, may fall a meaning percentage below nominal—shut to UVLO—at lower input voltages. In this case, input voltage ripple should exist addressed since input filter oscillations can occur due to poor damping under heavy load electric current. This design uses a big 680μF POSCAP and two 47μF ceramic capacitors to recoup for meter-long input cables used during bench testing.

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Electronic Power Conversion

TC Green PhD, MIEE, CEng , in Electrical Engineer's Reference Book (Sixteenth Edition), 2003

18.7.1 Interleaved SMPS

There is a strong want in SMPS design to reduce output voltage ripple and input current ripple (peculiarly in mains connected equipment subject area to EMC constraints). Effigy 18.59 shows an example of parallel connected output stages with interleaved performance of the switches. It tin can be seen that the resultant current ripple is at twice the frequency of operation of the switches and that each switch has processed half of the current. Viewed in the frequency domain, nosotros would run across ripple current components at all of the fifty-fifty multiples of the switching frequency, whereas those at odd multiples created by one module will have been cancelled by those created (in anti-phase) past the other module. The same principle was used in the unmarried-phase d.c./a.c. converter of Section 18.3.ane in which the two halves of the bridge were operated with phase-shifted carriers.

Figure 18.59. A pair of interleaved Cadet SMPS showing a reduction of amplitude and increment in the effective frequency of the current ripple

This idea tin can be extended to series connection of modules and to whatever number of modules. Information technology can exist practical to the input connection, output connection or both. In general, an northward-module system has an effective switching rate (ripple frequency) of nf _s. In all cases it is important to match components and operating weather condition in the modules in social club to achieve the desired counterfoil of ripple components.

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LT1070 design manual

Carl Nelson , in Analog Circuit Design, 2011

Output capacitor

The principal criteria for selecting C2 is low ESR (effective series resistance), to minimize output voltage ripple. A reasonable pattern procedure is to let the reactance of the output capacitor contribute no more than 1/3 of the total tiptop-to-peak output voltage ripple (Five_P-P), yielding:

(28) $\text{C}2\ge \frac{{\text{Five}}_{\text{OUT}}•{\text{I}}_{\text{OUT}}}{\text{f}({\text{V}}_{\text{IN}}+{\text{V}}_{\text{OUT}})(0.33{\text{V}}_{\text{P-P}})}$

Using 5_OUT  =   12V, I_OUT  =   1A, V_IN  =   5V, f   =   40kHz and V_P-P =200mV,

$\text{C}2\ge \frac{12•\mathrm{ane}}{(40•{10}^3)(5+12)(0.33•0.2)}=268\mu \text{F}$

This leaves 67% of the ripple owing to ESR, giving:

(29) $\begin{array}{lll}\text{ES}{\text{R}}_{(\text{MAX})}\hfill & =\hfill & \frac{0.67•{\text{V}}_{\text{P-P}}•{\text{V}}_{\text{IN}}}{{\text{I}}_{\text{OUT}}({\text{5}}_{\text{IN}}+{\text{V}}_{\text{OUT}})}\hfill \\ \hfill & =\hfill & \frac{0.67•0.2•\mathrm{v}}{1(5+12)}=0.04\Omega \hfill \end{array}$

After C2 has been selected, output voltage ripple may be calculated from:

(thirty) ${\text{V}}_{\text{P-P}}={\text{I}}_{\text{OUT}}\left(\frac{{\text{V}}_{\text{IN}}+{\text{Five}}_{\text{OUT}}}{{\text{V}}_{\text{IN}}}•\text{ESR}+\frac{{\text{V}}_{\text{OUT}}}{({\text{V}}_{\text{IN}}+{\text{V}}_{\text{OUT}})(\text{f})(\text{C}\mathrm{ii})}\right)$

If lower output ripple is required, a larger output capacitor must be used with lower ESR. Information technology is ofttimes necessary to use capacitor values much college than calculated to obtain the required ESR. In the instance shown, capacitors with guaranteed ESR less than 0.04Ω with a working voltage of 15V generally fall in the 1000μF to 2000μF range. Higher voltage units have lower capacitance for the same ESR.

A second pick to reduce output ripple is to add a small LC output filter. If the LC product of the filter is much smaller than L1   •   C2, it will not bear on loop phase margin. Dramatic reduction in output ripple can be achieved with this filter, oft at lower cost and less board space than simply increasing C2. Come across section on output filters for details.

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Efficient dual polarity output converter fits into tight spaces

Keith Szolusha , in Analog Circuit Design, Volume Three, 2015

Introduction

This pattern notation describes a compact and efficient ±5V output dual polarity converter that uses a single buck regulator. The topology shown features 3mm maximum circuit top, loftier efficiency and depression output voltage ripple on a 5V output—important considerations for many battery-powered, handheld and racket-sensitive devices. This combination of features is not easily achievable with other ordinarily used dual polarity topologies. For example, one culling topology, a flyback converter using a boost regulator, is relatively inefficient, requires a bulky (5mm or taller) transformer and generates high output voltage ripple. Some other alternative, using two buck regulators, incurs both the toll of the additional regulator and the cost of the PCB real manor information technology occupies.

The single buck regulator topology shown here requires few components. To reduce the maximum circuit height, it uses 2 power inductors instead of a transformer. In the absence of the transformer core, the coupling capacitor allows free energy to pass between the positive and negative sides of the circuit while maintaining a voltage potential between the two inductors, indirectly regulating the negative output.

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High efficiency, high density three-phase supply delivers 60A with power saving Stage Shedding, active voltage positioning and nonlinear control for superior load step response

Jian Li , Kerry Holliday , in Analog Circuit Design, Volume Three, 2015

one.5V/60A, 3-phase power supply

Effigy 38.one shows a 7V to 14V input, one.5V/60A output awarding. The LTC3829's three channels run 120° out-of-phase, which reduces input RMS current ripple and output voltage ripple compared to unmarried-channel solutions. Each phase uses ane top MOSFET and two bottom MOSFETs to provide up to 20A of output electric current.

Figure 38.1. A ane.5V/60A iii-Phase Converter Featuring the LTC3829

The LTC3829 includes unique features that maximize efficiency, including strong gate drivers, short dead times and a programmable Stage Shedding mode, where ii of the 3 phases close down at light load. Onset of Phase Shedding mode can be programmed from no load to 30% load. Figure 38.two shows the efficiency of this regulator at over 86.5% with a 12V input and a 1.5V/60A output with Stage Shedding mode, dramatically increasing light load efficiency.

Effigy 38.ii. Efficiency Comparison of Phase Shedding vs CCM

The current mode control architecture of the LTC3829 ensures that DC load current is evenly distributed amid the three channels, as shown in Figure 38.iii. Dynamic, cycle-past-bicycle current sharing performance is similarly tight in the face of load transients.

Figure 38.iii. Current Sharing Performance between Phases

A fast and controlled transient response is another of import requirement for modern power supplies. The LTC3829 includes 2 features that reduce the meridian-to-superlative output voltage circuit during a load stride: programmable nonlinear command or programmable active voltage positioning (AVP). Figure 38.4 shows the transient response without these features enabled. Figure 38.five shows that nonlinear control improves top-to-peak response past 17%. Figure 38.6 shows that AVP can reach a 50% reduction in the amplitude of voltage spikes.

Figure 38.4. Transient Operation without AVP and Nonlinear Control

Figure 38.5. Transient Performance with Nonlinear Control

Effigy 38.six. Transient Operation with AVP

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Tiny versatile cadet regulators operate from 3.6V to 36V input

Hua (Walker) Bai , in Analog Excursion Blueprint, Volume Three, 2015

LT1936 produces three.3V at 1.2A from four.5V to 36V

Figure 61.1 shows a typical application for the LT1936. This excursion generates three.3V at 1.2A from an input of 4.5V to 36V. With the same input voltage range, the LT1933 circuit can supply 500mA. The typical output voltage ripple of the Figure 61.ane excursion is less than 16mV while efficiency is as high as 89%. Splendid transient response is possible with either external bounty or the internal compensation; this excursion uses internal compensation to minimize component count. A high ESR electrolytic capacitor, C6 in Effigy 61.1, is recommended to damp overshoot voltage in applications where the circuit is plugged into a live input source through long leads. For more than information, refer to the LT1933 or LT1936 data canvas.

Effigy 61.1. Typical Awarding of LT1936 Accepts 4.5V to 36V and Produces 3.3V/1.2A

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36V 2A buck regulator integrates power Schottky

David Ng , in Analog Excursion Design, Volume Iii, 2015

Low ripple and high efficiency solution over a broad load range

The LT3681 switching frequency can be programmed from 300kHz to ii.8MHz by using a resistor tied from the RT pin to ground. The LT3681 offers low ripple Outburst Mode operation that maintains high efficiency at calorie-free loads while keeping the no load output voltage ripple below 15mV _P–P.

During Burst Style operation, the LT3681 is able to deliver current in as little as one cycle to the output capacitor followed past sleep periods where all of the output power is delivered to the load by the output capacitor. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply electric current to only 55μA. Every bit the load electric current decreases toward no load, the percentage of time that the LT3681 operates in sleep mode increases and the average input electric current is greatly reduced, so high efficiency is maintained.

Figure 52.iii shows the depression ripple and single wheel burst inductor current at no load for the 3.3V regulator shown in Figures 52.ane and 52.2. The LT3681 has a very low shutdown current (less than 1μA), significantly extending battery life in applications that spend long periods in sleep or shutdown mode.

Effigy 52.three. This LT3681 Pattern Has Only 15mV of Output Ripple, Fifty-fifty at No Load Under Burst Way Operation

For systems that rely on a well-regulated power source, the LT3681 provides a power good flag that signals when V_OUT reaches 90% of the programmed output voltage.

A resistor and capacitor on the RUN/SS pin programs the LT3681'southward soft-first, reducing the inrush current during start-up. In applications where the excursion is plugged into a live input source through long leads, an electrolytic input capacitor, which has higher ESR than a ceramic capacitor, is recommended to dampen the overshoot voltage. Refer to Application Notation 88 for further details.

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Power

Marilyn Wolf , in Embedded Organization Interfacing, 2019

7.2 Power Supply Specifications

The nigh basic specification of a DC power supply is its output voltage and maximum output current. The maximum output current is typically specified relative to a load impedance. Many power supplies provide several unlike output voltages all derived from a common core.

Output voltage ripple is a very important specification for digital and particularly for analog circuits. Ripple does not accept to exist periodic; in this case, it refers to any variation in the output voltage. While digital circuits tend to be relatively insensitive to ability supply voltage, large amounts of ripple may cause errors. Analog circuits are particularly sensitive to power supply ripple. Since output voltages are produced relative to the power supply, variations in the power supply effect in variations in those outputs.

Conversion efficiency measures the ratio of power delivered to the load to the total power consumed by the ability supply. As shown in Fig. seven.1, efficiency varies with the power delivered to the load. Almost ability supplies are less efficient at depression loads—the overhead power consumption of the supply by and large does not scale well with load power.

Fig. seven.1. Ability supply conversion efficiency versus power delivered to the load.

Heat dissipation is an important metric that may determine the example used for the system or whether it needs some form of active cooling such as a fan. Power supplies practise not e'er straight specify their heat output. However, we do know that for a given ability output, more efficient power supplies will produce less heat.

The ground voltage is often used equally a reference voltage throughout the circuit. The term footing is not called arbitrarily. A truthful earthed ground is directly connected to the Earth through a depression-resistance connectedness. The voltage of the Earth is very difficult to change—Gauss'southward Law tells united states of america that any charge sent to the earthed ground will exist every bit distributed across the surface of the Globe. Since a keen deal of accuse is required to noticeably alter the voltage of the Globe, it provides a very proficient reference voltage.

Power supplies for mixed-betoken systems generally provide a separate analog ground that is singled-out from the digital footing. Digital signals can generate big swings that produce variations from the nominal ground voltage. Since analog signals are particularly sensitive to power supply dissonance, we want to isolate the analog circuits from noise created by the digital circuits.

Prophylactic is a disquisitional requirement for power supplies. Shocks from AC utility lines can be fatal. Improper design of ability supplies can lead to fires. Even low voltages can harm other devices. Nosotros must carefully blueprint power supplies to minimize their risk of dangerous operation and failure.

Batteries require some specialized specifications; we volition defer their discussion to Department seven.5.

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Ultralow ability boost converters require only eight.5μA of standby quiescent current

Xiaohua Su , in Analog Circuit Blueprint, Volume Three, 2015

Awarding example

Figure 115.1 details the LT8410 boost converter generating a 16V output from a two.5V-to-16V input source. The LT8410/-i controls ability commitment by varying both the peak inductor current and switch off fourth dimension. This command scheme results in low output voltage ripple too as loftier efficiency over a wide load range. Figures 115.ii and 115.3 show efficiency and output peak-to-elevation ripple for Figure 115.1's circuit. Output ripple voltage is less than 10mV despite the excursion's minor (0.1μF) output capacitor.

Figure 115.1. 2.5V–16V to 16V Heave Converter

Figure 115.ii. Efficiency vs Load Current for Figure 115.1 Converter

Figure 115.3. Output Peak-to-Superlative Ripple vs Load Current for Figure 115.1 Converter at three.6V

The soft-outset feature is implemented by connecting an external capacitor to the V_REF pin. If soft-start is not needed, the capacitor can be removed. Output voltage is fix by a resistor divider from the V_REF pin to basis with the middle tap continued to the FBP pin, as shown in Figure 115.1. The FBP pin tin can besides exist biased direct past an external reference.

The $\overline{\text{SHDN}}$ pivot of the LT8410/-one can serve as an on/off switch or equally an undervoltage lockout via a uncomplicated resistor divider from V_CC to ground.

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